2018-11-16 00:31:39 +01:00
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/*****************************************************************************\
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Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
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This file is licensed under the Snes9x License.
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For further information, consult the LICENSE file in the root directory.
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\*****************************************************************************/
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2010-09-25 17:46:12 +02:00
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/*****
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* SPC7110 emulator - version 0.03 (2008-08-10)
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* Copyright (c) 2008, byuu and neviksti
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* The software is provided "as is" and the author disclaims all warranties
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* with regard to this software including all implied warranties of
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* merchantibility and fitness, in no event shall the author be liable for
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* any special, direct, indirect, or consequential damages or any damages
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* whatsoever resulting from loss of use, data or profits, whether in an
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* action of contract, negligence or other tortious action, arising out of
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* or in connection with the use or performance of this software.
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*****/
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#include <limits>
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#include "snes9x.h"
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#include "memmap.h"
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#include "srtc.h"
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#include "display.h"
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#define memory_cartrom_size() Memory.CalculatedSize
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#define memory_cartrom_read(a) Memory.ROM[(a)]
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#define memory_cartrtc_read(a) RTCData.reg[(a)]
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#define memory_cartrtc_write(a, b) { RTCData.reg[(a)] = (b); }
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#define cartridge_info_spc7110rtc Settings.SPC7110RTC
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#define cpu_regs_mdr OpenBus
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#include "spc7110emu.h"
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#include "spc7110emu.cpp"
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SPC7110 s7emu;
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static void SetSPC7110SRAMMap (uint8);
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void S9xInitSPC7110 (void)
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{
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s7emu.power();
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memset(RTCData.reg, 0, 20);
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}
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void S9xResetSPC7110 (void)
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{
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s7emu.reset();
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}
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static void SetSPC7110SRAMMap (uint8 newstate)
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{
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if (newstate & 0x80)
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{
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Memory.Map[0x006] = (uint8 *) Memory.MAP_HIROM_SRAM;
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Memory.Map[0x007] = (uint8 *) Memory.MAP_HIROM_SRAM;
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Memory.Map[0x306] = (uint8 *) Memory.MAP_HIROM_SRAM;
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Memory.Map[0x307] = (uint8 *) Memory.MAP_HIROM_SRAM;
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}
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else
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{
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Memory.Map[0x006] = (uint8 *) Memory.MAP_RONLY_SRAM;
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Memory.Map[0x007] = (uint8 *) Memory.MAP_RONLY_SRAM;
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Memory.Map[0x306] = (uint8 *) Memory.MAP_RONLY_SRAM;
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Memory.Map[0x307] = (uint8 *) Memory.MAP_RONLY_SRAM;
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}
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}
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uint8 * S9xGetBasePointerSPC7110 (uint32 address)
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{
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uint32 i;
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switch (address & 0xf00000)
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{
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case 0xd00000:
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i = s7emu.dx_offset;
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break;
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case 0xe00000:
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i = s7emu.ex_offset;
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break;
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case 0xf00000:
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i = s7emu.fx_offset;
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break;
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default:
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i = 0;
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break;
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}
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i += address & 0x0f0000;
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return (&Memory.ROM[i]);
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}
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uint8 S9xGetSPC7110Byte (uint32 address)
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{
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uint32 i;
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switch (address & 0xf00000)
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{
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case 0xd00000:
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i = s7emu.dx_offset;
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break;
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case 0xe00000:
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i = s7emu.ex_offset;
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break;
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case 0xf00000:
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i = s7emu.fx_offset;
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break;
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default:
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i = 0;
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break;
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}
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i += address & 0x0fffff;
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return (Memory.ROM[i]);
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}
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uint8 S9xGetSPC7110 (uint16 address)
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{
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if (!Settings.SPC7110RTC && address > 0x483f)
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return (OpenBus);
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return (s7emu.mmio_read(address));
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}
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void S9xSetSPC7110 (uint8 byte, uint16 address)
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{
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if (!Settings.SPC7110RTC && address > 0x483f)
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return;
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if (address == 0x4830)
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SetSPC7110SRAMMap(byte);
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s7emu.mmio_write(address, byte);
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}
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void S9xSPC7110PreSaveState (void)
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{
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s7snap.r4801 = s7emu.r4801;
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s7snap.r4802 = s7emu.r4802;
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s7snap.r4803 = s7emu.r4803;
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s7snap.r4804 = s7emu.r4804;
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s7snap.r4805 = s7emu.r4805;
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s7snap.r4806 = s7emu.r4806;
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s7snap.r4807 = s7emu.r4807;
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s7snap.r4808 = s7emu.r4808;
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s7snap.r4809 = s7emu.r4809;
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s7snap.r480a = s7emu.r480a;
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s7snap.r480b = s7emu.r480b;
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s7snap.r480c = s7emu.r480c;
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s7snap.r4811 = s7emu.r4811;
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s7snap.r4812 = s7emu.r4812;
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s7snap.r4813 = s7emu.r4813;
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s7snap.r4814 = s7emu.r4814;
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s7snap.r4815 = s7emu.r4815;
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s7snap.r4816 = s7emu.r4816;
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s7snap.r4817 = s7emu.r4817;
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s7snap.r4818 = s7emu.r4818;
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s7snap.r481x = s7emu.r481x;
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s7snap.r4814_latch = s7emu.r4814_latch ? TRUE : FALSE;
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s7snap.r4815_latch = s7emu.r4815_latch ? TRUE : FALSE;
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s7snap.r4820 = s7emu.r4820;
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s7snap.r4821 = s7emu.r4821;
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s7snap.r4822 = s7emu.r4822;
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s7snap.r4823 = s7emu.r4823;
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s7snap.r4824 = s7emu.r4824;
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s7snap.r4825 = s7emu.r4825;
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s7snap.r4826 = s7emu.r4826;
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s7snap.r4827 = s7emu.r4827;
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s7snap.r4828 = s7emu.r4828;
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s7snap.r4829 = s7emu.r4829;
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s7snap.r482a = s7emu.r482a;
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s7snap.r482b = s7emu.r482b;
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s7snap.r482c = s7emu.r482c;
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s7snap.r482d = s7emu.r482d;
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s7snap.r482e = s7emu.r482e;
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s7snap.r482f = s7emu.r482f;
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s7snap.r4830 = s7emu.r4830;
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s7snap.r4831 = s7emu.r4831;
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s7snap.r4832 = s7emu.r4832;
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s7snap.r4833 = s7emu.r4833;
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s7snap.r4834 = s7emu.r4834;
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s7snap.dx_offset = (uint32) s7emu.dx_offset;
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s7snap.ex_offset = (uint32) s7emu.ex_offset;
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s7snap.fx_offset = (uint32) s7emu.fx_offset;
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s7snap.r4840 = s7emu.r4840;
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s7snap.r4841 = s7emu.r4841;
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s7snap.r4842 = s7emu.r4842;
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s7snap.rtc_state = (int32) s7emu.rtc_state;
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s7snap.rtc_mode = (int32) s7emu.rtc_mode;
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s7snap.rtc_index = (uint32) s7emu.rtc_index;
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s7snap.decomp_mode = (uint32) s7emu.decomp.decomp_mode;
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s7snap.decomp_offset = (uint32) s7emu.decomp.decomp_offset;
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for (int i = 0; i < SPC7110_DECOMP_BUFFER_SIZE; i++)
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s7snap.decomp_buffer[i] = s7emu.decomp.decomp_buffer[i];
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s7snap.decomp_buffer_rdoffset = (uint32) s7emu.decomp.decomp_buffer_rdoffset;
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s7snap.decomp_buffer_wroffset = (uint32) s7emu.decomp.decomp_buffer_wroffset;
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s7snap.decomp_buffer_length = (uint32) s7emu.decomp.decomp_buffer_length;
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for (int i = 0; i < 32; i++)
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{
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s7snap.context[i].index = s7emu.decomp.context[i].index;
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s7snap.context[i].invert = s7emu.decomp.context[i].invert;
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}
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}
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void S9xSPC7110PostLoadState (int version)
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{
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s7emu.r4801 = s7snap.r4801;
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s7emu.r4802 = s7snap.r4802;
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s7emu.r4803 = s7snap.r4803;
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s7emu.r4804 = s7snap.r4804;
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s7emu.r4805 = s7snap.r4805;
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s7emu.r4806 = s7snap.r4806;
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s7emu.r4807 = s7snap.r4807;
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s7emu.r4808 = s7snap.r4808;
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s7emu.r4809 = s7snap.r4809;
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s7emu.r480a = s7snap.r480a;
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s7emu.r480b = s7snap.r480b;
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s7emu.r480c = s7snap.r480c;
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s7emu.r4811 = s7snap.r4811;
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s7emu.r4812 = s7snap.r4812;
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s7emu.r4813 = s7snap.r4813;
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s7emu.r4814 = s7snap.r4814;
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s7emu.r4815 = s7snap.r4815;
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s7emu.r4816 = s7snap.r4816;
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s7emu.r4817 = s7snap.r4817;
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s7emu.r4818 = s7snap.r4818;
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s7emu.r481x = s7snap.r481x;
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s7emu.r4814_latch = s7snap.r4814_latch ? true : false;
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s7emu.r4815_latch = s7snap.r4815_latch ? true : false;
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s7emu.r4820 = s7snap.r4820;
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s7emu.r4821 = s7snap.r4821;
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s7emu.r4822 = s7snap.r4822;
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s7emu.r4823 = s7snap.r4823;
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s7emu.r4824 = s7snap.r4824;
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s7emu.r4825 = s7snap.r4825;
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s7emu.r4826 = s7snap.r4826;
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s7emu.r4827 = s7snap.r4827;
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s7emu.r4828 = s7snap.r4828;
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s7emu.r4829 = s7snap.r4829;
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s7emu.r482a = s7snap.r482a;
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s7emu.r482b = s7snap.r482b;
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s7emu.r482c = s7snap.r482c;
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s7emu.r482d = s7snap.r482d;
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s7emu.r482e = s7snap.r482e;
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s7emu.r482f = s7snap.r482f;
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s7emu.r4830 = s7snap.r4830;
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s7emu.r4831 = s7snap.r4831;
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s7emu.r4832 = s7snap.r4832;
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s7emu.r4833 = s7snap.r4833;
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s7emu.r4834 = s7snap.r4834;
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s7emu.dx_offset = (unsigned) s7snap.dx_offset;
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s7emu.ex_offset = (unsigned) s7snap.ex_offset;
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s7emu.fx_offset = (unsigned) s7snap.fx_offset;
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s7emu.r4840 = s7snap.r4840;
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s7emu.r4841 = s7snap.r4841;
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s7emu.r4842 = s7snap.r4842;
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s7emu.rtc_state = (SPC7110::RTC_State) s7snap.rtc_state;
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s7emu.rtc_mode = (SPC7110::RTC_Mode) s7snap.rtc_mode;
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s7emu.rtc_index = (unsigned) s7snap.rtc_index;
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s7emu.decomp.decomp_mode = (unsigned) s7snap.decomp_mode;
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s7emu.decomp.decomp_offset = (unsigned) s7snap.decomp_offset;
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for (int i = 0; i < SPC7110_DECOMP_BUFFER_SIZE; i++)
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|
|
s7emu.decomp.decomp_buffer[i] = s7snap.decomp_buffer[i];
|
|
|
|
|
|
|
|
|
|
s7emu.decomp.decomp_buffer_rdoffset = (unsigned) s7snap.decomp_buffer_rdoffset;
|
|
|
|
|
s7emu.decomp.decomp_buffer_wroffset = (unsigned) s7snap.decomp_buffer_wroffset;
|
|
|
|
|
s7emu.decomp.decomp_buffer_length = (unsigned) s7snap.decomp_buffer_length;
|
|
|
|
|
|
|
|
|
|
for (int i = 0; i < 32; i++)
|
|
|
|
|
{
|
|
|
|
|
s7emu.decomp.context[i].index = s7snap.context[i].index;
|
|
|
|
|
s7emu.decomp.context[i].invert = s7snap.context[i].invert;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
s7emu.update_time(0);
|
|
|
|
|
}
|
