snes9x/apu/bapu/smp/core.cpp

69 lines
1.5 KiB
C++
Raw Normal View History

2011-06-12 08:25:22 +02:00
void SMP::tick() {
timer0.tick();
timer1.tick();
timer2.tick();
2011-06-22 13:03:29 +02:00
clock++;
2011-06-27 22:41:17 +02:00
dsp.clock++;
2011-06-12 08:25:22 +02:00
}
void SMP::tick(unsigned clocks) {
timer0.tick(clocks);
timer1.tick(clocks);
timer2.tick(clocks);
clock += clocks;
dsp.clock += clocks;
}
2011-06-12 08:25:22 +02:00
void SMP::op_io() {
tick();
}
void SMP::op_io(unsigned clocks) {
tick(clocks);
}
2011-06-12 08:25:22 +02:00
uint8 SMP::op_read(uint16 addr) {
tick();
if((addr & 0xfff0) == 0x00f0) return mmio_read(addr);
if(addr >= 0xffc0 && status.iplrom_enable) return iplrom[addr & 0x3f];
2011-06-12 08:25:22 +02:00
return apuram[addr];
}
void SMP::op_write(uint16 addr, uint8 data) {
tick();
if((addr & 0xfff0) == 0x00f0) mmio_write(addr, data);
apuram[addr] = data; //all writes go to RAM, even MMIO writes
2011-06-12 08:25:22 +02:00
}
void SMP::op_step() {
#define op_readpc() op_read(regs.pc++)
#define op_readdp(addr) op_read((regs.p.p << 8) + ((addr) & 0xff))
#define op_writedp(addr, data) op_write((regs.p.p << 8) + ((addr) & 0xff), data)
2011-06-12 08:25:22 +02:00
#define op_readaddr(addr) op_read(addr)
#define op_writeaddr(addr, data) op_write(addr, data)
#define op_readstack() op_read(0x0100 | ++regs.sp)
#define op_writestack(data) op_write(0x0100 | regs.sp--, data)
2011-06-12 08:25:22 +02:00
if(opcode_cycle == 0)
2018-05-17 00:46:28 +02:00
{
#ifdef DEBUGGER
if (Settings.TraceSMP)
{
disassemble_opcode(tmp, regs.pc);
S9xTraceMessage (tmp);
}
#endif
2011-06-12 08:25:22 +02:00
opcode_number = op_readpc();
2018-05-17 00:46:28 +02:00
}
switch(opcode_number) {
#include "core/oppseudo_misc.cpp"
#include "core/oppseudo_mov.cpp"
#include "core/oppseudo_pc.cpp"
#include "core/oppseudo_read.cpp"
#include "core/oppseudo_rmw.cpp"
}
2011-06-12 08:25:22 +02:00
}